| 摘要 |
An oscillation signal that is provided from an inverter-type oscillation circuit 4 is input to an output driving circuit 5 . In the output driving circuit 5 , a control circuit 53 controls a voltage control circuit 52 and a buffer circuit 51 in accordance with control data written in a memory circuit 54 , to generate a clock signal with control data amplitude, duty ratio, rising/falling characteristics of an output waveform in accordance with the control data. The output driving circuit 5 is configured with a plurality of voltage control circuits and a plurality of buffer circuits to allow clock signals, each having different waveform characteristics, to be provided from a plurality of output terminals.
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