发明名称 SYNCHRONOUS/ASYNCHRONOUS INTERFACE CIRCUIT AND ELECTRONIC EQUIPMENT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a synchronous/asynchronous interface circuit and electronic equipment for connecting a synchronous circuit and an asynchronous circuit. <P>SOLUTION: A synchronous/asynchronous interface circuit (20) of the present invention comprises a finite state machine (22) that controls an access cycle to be performed between a synchronous bus (30) and an asynchronous CPU (10) into an event-driven type, and a detection circuit that detects the start of the access cycle. The finite state machine (22) performs a state transition through a handshake with the asynchronous CPU (10) in an interface with the asynchronous CPU (10) to control the access cycle and, on the other hand, performs a state transition synchronously with a global clock that is provided from the synchronous bus (30) in an interface with the synchronous bus (30) to control the access cycle. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005151412(A) 申请公布日期 2005.06.09
申请号 JP20030389190 申请日期 2003.11.19
申请人 SEIKO EPSON CORP 发明人 KARAKI NOBUO
分类号 H04L7/00;G06F13/40;H03K19/177;(IPC1-7):H04L7/00 主分类号 H04L7/00
代理机构 代理人
主权项
地址