SEMICONDUCTOR DEVICE AND CLOCK TRANSMISSION METHOD

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated device by which the fall timing of a clock is correctly transmitted to each circuit block even when a rise delay differs from a fall delay due to a difference in physical arrangements even for the entirely same cells.

SOLUTION: A clock generation means 11 comprises: generating a clock signal (CLKP) used as a reference for a system operation and a reverse clock signal (CLKN) formed by reversing the former clock signal; forming the former clock signal and the reverse clock signal as a pair; inserting buffers at specified intervals for the pair; and transmitting the pair to a data processing means 14 housing circuits using clocks from the clock generation means 11. Thus, the pair is synchronized with the timing having a clock cycle of 50% to operate a flip-flop even when the rise delay differs from the fall delay due to the difference in the physical arrangements in the entirely same cells.

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