Apparatus and method for detecting and rejecting high impedance failures in chip interconnects

摘要

A method and corresponding apparatus for detecting and rejecting high impedance failures in chip interconnects use monitoring circuitry on a chip to provide accurate and pro-active prediction of interconnect failures. The apparatus may include a resistance continuity monitoring circuit (RCMC), and a signal path connecting a representative set of pins to the RCMC. The RCMC measures the resistance of a connection of the representative set of pins with a circuit board during system operation and outputs a measured resistance data. The apparatus further includes additional analog-to-digital (A/D) hardware to perform an analog to digital conversion of the measured resistance data. Additional on-chip circuitry and/or microcode may be used to perform an algorithm on the digital resistance data to generate an interconnect status signal. For example, the method may output a failure signal when the measured resistance data exceeds a threshold resistance value. The apparatus further includes a system interface to send the interconnect status signal to other system management devices.