发明名称 Method to form shallow trench isolation with rounded upper corner for advanced semiconductor circuits
摘要 A trench structure in a wafer of semiconductor material and the method of forming the trench structure are described. The trench structure is formed on a semiconductor wafer that has a top surface of slow oxidization rate-slower than that of other major crystallographic planes of the semiconductor material. The trench is etched into the semiconductor wafer. The trench has substantially vertical trench-sidewalls near the top surface, the vertical trench-sidewalls near the top surface containing crystallographic plane that oxidizes at a rate comparable to that of the top surface. An insulating layer is grown on the top surface and on the trench-sidewalls and on corners where sidewall surfaces approach the top surface, the insulating layer at the corners being substantially thicker than at the sidewall adjacent to the corners. The difference in the oxide thickness is due to the faster oxidizing planes exposed at the corners. Finally, the trench is filled with a dielectric material.
申请公布号 US2005062127(A1) 申请公布日期 2005.03.24
申请号 US20030691843 申请日期 2003.10.23
申请人 CHEN ZHIHAO;MEHRAD FREIDOON;KIRKPATRICK BRIAN K.;WHITE JEFF A.;RUSSELL EDMUND G.;HOLT JON;MEHIGAN JASON D. 发明人 CHEN ZHIHAO;MEHRAD FREIDOON;KIRKPATRICK BRIAN K.;WHITE JEFF A.;RUSSELL EDMUND G.;HOLT JON;MEHIGAN JASON D.
分类号 H01L21/316;H01L21/762;(IPC1-7):H01L29/00 主分类号 H01L21/316
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