发明名称 TIME DELAY CORRECTION CIRCUIT, VIDEO DATA PROCESSING CIRCUIT, AND FLAT DISPLAY UNIT
摘要 <p><P>PROBLEM TO BE SOLVED: To effectively avoid a delay time change in a logic circuit formed of TFTs by applying this invention to, for instance, a liquid display unit having an integral structure composed of an insulating board and a drive circuit formed thereon as to a delay time correction circuit, a video data processing circuit, and a flat display device. <P>SOLUTION: Dummy data are inserted into input data D1 so as to forcibly switch the logic level of the input data D1 (4). <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005065208(A) 申请公布日期 2005.03.10
申请号 JP20030347803 申请日期 2003.10.07
申请人 SONY CORP 发明人 MURASE MASAKI;NAKAJIMA YOSHIHARU;KIDA YOSHITOSHI
分类号 G09G3/36;H03K3/356;H03K5/13;H03K19/0185;(IPC1-7):H03K5/13;H03K19/018 主分类号 G09G3/36
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