发明名称 Circuit simulation using encoding of repetitive subcircuits
摘要 A method and apparatus for simulating a circuit is described. In one embodiment, the method comprises representing a plurality of identical components in a reduced form as a circuit having a single instance of the identical component with encoding for each input of the single instance to represent corresponding inputs to all of the plurality of identical components and decoding for each output port of the single instance to create output ports for the outputs associated with all of the plurality of identical components and symbolically simulating the reduced form of the circuit with simulation results being the same as results of symbolically simulating the plurality of identical components.
申请公布号 US6865525(B1) 申请公布日期 2005.03.08
申请号 US20010774989 申请日期 2001.01.30
申请人 SYNOPSYS, INC. 发明人 ZHONG JOHN XIAOXIONG
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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