发明名称 INFORMATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To reduce the frequency of the emulation of the privilege instruction of each guest by a host, and to improve the instruction executing efficiency of the guest. SOLUTION: Processors 101a and 101b and a memory 104 configuring an information processor are virtualized, and divided into the arbitrary number of logical blocks(guests) to be operated by an operating system which are respectively different from a host. Processors 101a and 101b are provided with a host privilege register set 208a and a guest privilege register set 208b, and when any privilege instruction which does not necessitate the setting change of the host privilege register set 208a is executed while the instruction is being executed by the guest, the reference and update of the guest privilege register set 208b is executed without generating any privilege instruction exception, and when any privilege instruction which necessitates the setting change of the host privilege register set 208a is executed, the privilege instruction exception is generated, and the host is made to execute the emulation of the instruction. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005056017(A) 申请公布日期 2005.03.03
申请号 JP20030206749 申请日期 2003.08.08
申请人 HITACHI LTD 发明人 NAKAMURA TARO;MORIKI TOSHIOMI;UEHARA KEITARO;TSUSHIMA YUJI
分类号 G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F9/46
代理机构 代理人
主权项
地址