发明名称 MUTE CIRCUIT AND MUTE METHOD
摘要 PROBLEM TO BE SOLVED: To provide a mute method which always gives a small offset amount of DC offset and has a short detection wait time Td. SOLUTION: A circuit between a point A terminal to which an AC input signal Sin to be muted by an execution trigger of a mute control signal D1 and a point B terminal is opened. By the execution trigger, a potential of an AC ground AC GND is selected and is outputted as a reference potential. A potential at the point B terminal is made equal to the reference potential, and a cross timing D8 at which the potential at the point B terminal is equal to the reference potential is detected. A circuit between the AC ground ACGND and the point B terminal is short-circuited by the cross timing D8. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005038461(A) 申请公布日期 2005.02.10
申请号 JP20030197357 申请日期 2003.07.15
申请人 TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP 发明人 KATO SUSUMU
分类号 H04R3/00;G11B20/00;G11B20/02;(IPC1-7):G11B20/00 主分类号 H04R3/00
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