| 发明名称 |
Method of improving device resistance |
| 摘要 |
A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.
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| 申请公布号 |
US6849526(B2) |
申请公布日期 |
2005.02.01 |
| 申请号 |
US20040708210 |
申请日期 |
2004.02.17 |
| 申请人 |
MACRONIX INTERNATIONAL CO., LTD. |
发明人 |
LAI JIUN-REN;YANG CHUN-YI;CHEN SHI-XIAN;CHANG GWEN |
| 分类号 |
H01L21/768;H01L21/8246;H01L27/10;H01L27/112;H01L27/115;(IPC1-7):H01L21/425 |
主分类号 |
H01L21/768 |
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