Semiconductor integrated circuit

摘要

To provide an output circuit having a low parasitic capacitance and resistance in the drains of output transistors, which is operable at a high speed and its ESD performance is improved. A devoted electrostatic discharge protection circuit is provided between the output terminal (pin) and the ground terminal (or power supply terminal). An output circuit which is in parallel connected to this electrostatic discharge protection circuit comprises a first and second MOS transistors which are cascade-connected to each other. The entire area of the source/drain regions of the first and second MOS transistors are silicided. Both transistors have their gate electrodes which are connected to an internal circuit. The source doped region of the first MOS transistor is separated from the drain doped region of the second MOS transistor and they are connected to each other by metal wiring.