发明名称 WOBBLE CLOCK GENERATOR AND DRIVING METHOD THEREOF
摘要 A wobble clock generator with a protective mechanism that can avoid interference generated from a phase-modulated wobble signal. The wobble clock generator has an arithmetic/logic circuit and a phase-locked loop. The arithmetic/logic circuit calculates a period count value by counting a period of a wobble signal according to a reference clock, and compares an average value with the period count value for outputting a control signal. The phase-locked loop is electrically connected to the arithmetic/logic circuit for generating a wobble clock according to the control signal and the wobble signal. When the control signal corresponds to a first logic level, the phase-locked loop compares the wobble signal with the wobble clock to drive the wobble clock to be synchronized with the wobble signal. When the control signal corresponds to a second logic level, the phase-locked loop holds the wobble signal without synchronizing the wobble clock with the wobble signal.
申请公布号 US2005018801(A1) 申请公布日期 2005.01.27
申请号 US20040709004 申请日期 2004.04.07
申请人 HSIAO YUAN-KUN 发明人 HSIAO YUAN-KUN
分类号 G11B5/09;G11B7/00;G11B7/0045;G11B7/095;G11B19/00;G11B20/10;G11B20/16;G11B27/10;G11B27/24;H01H47/00;H03D3/24;H03D13/00;H03L7/00;H03L7/06;H03L7/08;H03L7/089;H03L7/16;H04B3/46;(IPC1-7):H03D3/24 主分类号 G11B5/09
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