| 摘要 |
PROBLEM TO BE SOLVED: To provide a bus system to improve the transfer rate of a whole module and the reliability of the reception of a command address bus and to achieve the reduction of costs. SOLUTION: A memory module 1-2 is provided with an interface with command address buses 1-7a and 1-7b. The command address bus 1-7b converts a NRZ signal outputted by a memory controller 1-1 connected to a memory module 1-2 into a polarized RZ signal by directional coupling. The above interface receives the polarized RZ signal inputted by the command address bus 1-7b, and restores the NRZ signal. And the above interface executes initialization processing to match the level of the NRZ signal outputted by the memory controller 1-1 with the level of the restored NRZ signal inputted by the command address bus 1-7b according to the pulse of the polarized RZ signal prior to the reception of a command address signal. COPYRIGHT: (C)2005,JPO&NCIPI
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