发明名称 |
Reading a selected register in a series of computational units forming a processing pipeline upon expiration of a time delay |
摘要 |
A system and method for reading register contents from a computational pipeline having a plurality of computational units. The system includes a readback bus and a read control unit. The readback bus has a plurality of logic units coupled in a series. Each logic unit couples to a corresponding one of the computational units. The read control unit couples to each of the computational units through a corresponding load line, and is configured to assert a load signal on one of the load lines in response to a register read request. Each of the computational units is configured to transmit a data value from a selected register onto the readback bus in response to detecting an assertion of the load signal on its corresponding load line.
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申请公布号 |
US6842851(B2) |
申请公布日期 |
2005.01.11 |
申请号 |
US20020085642 |
申请日期 |
2002.02.28 |
申请人 |
SUN MICROSYTEMS, INC. |
发明人 |
BURK WAYNE ERIC;KUBALSKA EWA M.;EMBERLING BRIAN D. |
分类号 |
G06F9/00;G06F9/30;G06F9/38;G06F15/00;(IPC1-7):G06F15/00 |
主分类号 |
G06F9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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