发明名称 Semiconductor integrated circuit wiring condition processing program
摘要 A computer program stored on a storage medium for performing wiring condition processing for a semiconductor integrated circuit. The computer program when executed causes a computer to perform the steps of creating layout information to determine a layout of devices on the semiconductor integrated circuit based on logic information describing connections of the devices on the semiconductor integrated circuit, determining a virtual wiring path from the layout information and calculating a wiring delay value based on the virtual wiring path. Other steps performed upon execution of the computer program include upon the calculated wiring delay value of the virtual wiring path exceeding a predetermined reference value, calculating a wiring delay value of the virtual wiring path when a wide wiring line is used at a predetermined usage ratio.
申请公布号 US6836876(B2) 申请公布日期 2004.12.28
申请号 US20020133574 申请日期 2002.04.29
申请人 HITACHI, LTD. 发明人 SUZUKI KATSUYOSHI;MOGAKI MASATO;HONGYO KATSUAKI
分类号 H01L21/82;G06F17/50;(IPC1-7):G06F17/50 主分类号 H01L21/82
代理机构 代理人
主权项
地址
您可能感兴趣的专利