| 摘要 |
PURPOSE:To compress the scale of a linear density conversion by employing constitution using image element decision accuracy lower than image element designation accuracy in linear density conversion. CONSTITUTION:The linear density conversion circuit is provided with an image element designation circuit to express the interval of two adjacent image elements in N bits assuming one image element of an input image as a point, and an image element decision circuit to decide the image element by receiving the output of high-order (N-l) (N>I>O, I:integer) bits out of the output of the N bits of the image element designation circuit. A signal S4 that is the output of seven bits can be obtained at a register 3 as inter-image element position information, however, a fixed memory circuit 4 outputs black (1) or white (0) to a decision image element signal S7 setting a signal S5 that is high-order four bits out of the seven bits of the above signal S4 as input. For example, the difference of the comparison of the result of the decision of the image element for the input of a circuit 4 by the signal S5 representing the high-order four bits of the signal S4 with the result of the decision of the image element obtained by using all the seven bits cannot be discriminated by human vision. Therefore, it is possible to set the image element decision accuracy for the fixed memory circuit 4 lower than image element positioning accuracy outputted from the register 3. |
