| 摘要 |
A non-volatile semiconductor memory device has a memory cell array region in which a plurality of memory cells are disposed in both column and row directions, each of the memory cells having first and second MONOS memory cells controlled by a word gate and first and second control gates. The memory cell array region is divided in the row direction into a plurality of sector regions extending longitudinally in the column direction. Each of the sector regions is divided into a plurality of large blocks, such as eight large blocks. There are eight control gate drivers for each sector region. Each of these eight control gate drivers sets potentials for first and second control gates of all the memory cells disposed within the corresponding one block of the eight large blocks.
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