| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a verification method of sequence control, which has upper and lower level control devices, and which can greatly reduce time for verification when designing a sequence control system for performing the sequence control of equipment. <P>SOLUTION: The verification method of sequence control including steps (a1) ... (c) is used. In the step (a1), the upper level control device 1 for performing system status determination acquires the equipment status information of a simulated shared memory 63 from a lower level control verification device 51. Here, the lower level control verification device 51 simulates the lower level control device for controlling the equipment including a shared memory, and also includes the simulated shared memory 63 for simulating the shared memory. In the step (a2), the upper level control device 1 transmits instruction information to the equipment to the lower level control verification device 51 on the basis of the status information. In the step (b), the lower level control verification device 51 stores the instruction information to the simulated shared memory 63. In the step (c), the lower level control verification device 51 evaluates the instruction information of the simulated shared memory 63. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
