发明名称 Method of design and fabrication of integrated circuits using regular arrays and gratings
摘要 A circuit fabrication and lithography process utilizes a mask including dense repetitive structures of features that result in a wide array of fine densely populated features on the exposed substrate film. Following this, a trimming procedure is performed to remove any unwanted fine patterned features providing multiple trimmed patterns on the substrate. An optional final step adds additional features as well as the interconnect features thus forming a circuit pattern. In this manner, all fine features may be generated using the exact same density of intensity patterns, and therefore, maximum consistency between features is established without the need for optical proximity correction. The secondary exposures are substantially independent from the initial dense-feature exposure in that the exposure of one set of features and the subsequent exposure of another set of features result in separate independent resist or masking layer reactions, thus minimizing corner rounding, line end shortening and other related spatial frequency effects and unwanted exposure memory effects.
申请公布号 US6818389(B2) 申请公布日期 2004.11.16
申请号 US20010952185 申请日期 2001.09.13
申请人 MASSACHUSETTS INSTITUTE OF TECHNOLOGY 发明人 FRITZE MICHAEL;TYRRELL BRIAN
分类号 G03F1/00;G03F1/14;G03F7/20;(IPC1-7):G03F7/00 主分类号 G03F1/00
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