| 摘要 |
PROBLEM TO BE SOLVED: To provide a processor core capable of efficiently connecting an arithmetic unit to the outside. SOLUTION: This processor core 10 is provided with an extention instruction for controlling an extended arithmetic unit 4, and further includes a control means 404 for executing the extention instruction, and an interface means for controlling the expansion arithmetic unit and for transferring data. An address signal, a read/write control signal, and write data signal are outputted from a stage arithmetic unit 402 of an extention unit to a data memory 31 to directly access the data memory. When it competes with access by the processor core, it is mediated by a selector 31. COPYRIGHT: (C)2005,JPO&NCIPI
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