发明名称 Semiconductor chip which combines bulk and SOI regions and separates same with plural isolation regions
摘要 A semiconductor chip comprises a base substrate, a bulk device region having a bulk growth layer on a part of the base substrate, an SOI device region having a buried insulator on the base substrate and a silicon layer on the buried insulator, and a boundary layer located at the boundary between the bulk device region and the SOI device region. The bulk device region has a first device-fabrication surface in which a bulk device is positioned on the bulk growth layer. The SOI device region has a second device-fabrication surface in which an SOI device is positioned on the silicon layer. The first and second device-fabrication surfaces are positioned at a substantially uniform level.
申请公布号 US2004195626(A1) 申请公布日期 2004.10.07
申请号 US20040828337 申请日期 2004.04.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YAMADA TAKASHI;NAGANO HAJIME;MIZUSHIMA ICHIRO;SATO TSUTOMU;OYAMATSU HISATO;NITTA SHINICHI
分类号 H01L21/762;H01L21/8234;H01L21/8242;H01L21/84;H01L27/08;H01L27/088;H01L27/108;H01L27/12;(IPC1-7):H01L27/01 主分类号 H01L21/762
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