| 摘要 |
A system for enabling communications between a first circuit block and a second circuit block of a processing system is described. The system has a plurality of registers for storing data from the first block. A steering circuit enables data to be written to one of the plurality of registers depending on the value of a write pointer signal. The data is only written to one the registers selected by the write pointer signal if that register is empty. The system also has a multiplexer to read the data from one of the plurality of registers in response to a read pointer signal. The data is only read from one of the registers selected by the read pointer signal if that register is full. The write and read pointers are each advanced so as to select the register to be written or read in a circular fashion.
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