| 摘要 |
<p>A drive circuit for an active backplane LCD comprises an inverter whose digital output (18) swings between two voltage rails providing a drive voltage. The inverter has a pair of n-type MOSFETS (41, 42) and a pair of p-type MOSFETS (43, 44) connected in series, the gate of the first (n-type) MOSFET driven by a first switching waveform, the gates of the middle n- and p- type MOSFETS held at a common mid-rail potential, and the gate of the last (p-type) MOSFET driven by a further switching waveform similar to that of the first voltage switching waveform but having a d.c. offset therefrom, the last MOSFET being switched in antiphase in synchrony with the first MOSFET. The first and further switching waveforms have peak to peak voltages preferably less than or equal to half the inter-rail voltage, thereby minimising the voltage across the gate oxides of the MOSFETS in use.</p> |
