| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which an electric short circuit between a lower interconnect line and an upper interconnect line can be prevented. <P>SOLUTION: A plurality of interconnect lines 55 which is separated by predetermined intervals on a semiconductor substrate 50, and comprises a first conductive layer pattern 52 and an insulated mask layer pattern 54 laminated on the first conductive layer pattern 52, is formed. An insulating film spacer 56 is formed on the sidewall of each interconnect line 55. A volume between the contiguous interconnect lines 55, 55 is reclaimed so as to touch a surface of the insulating film spacer 56, and a plurality of self alignment contact pads 62 consist of a second conductive layer are formed. An interlayer dielectric 64 is formed all over the surface of the substrate 50 in which the contact pad 62 is formed, the interlayer dielectric 64 is etched partially, and a contact hole 66 which exposes the contact pad 62 is formed. A selective epitaxial silicon layer 68 is formed on the surface of the contact pad 62 exposed through the contact hole 66, so as to shield the insulated mask layer pattern 54 of the interconnect line 55. <P>COPYRIGHT: (C)2004,JPO&NCIPI |
