METHOD FOR CONTROLLING CLOCK DELAY OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE FORMED THEREBY TO PERFORM TIMING CONTROL IN CONSIDERATION OF SYNCHRONIZATION OF CLOCK DELAY

摘要

PURPOSE: A method for controlling a clock delay of a semiconductor integrated circuit device is provided to adjust a clock delay by performing a timing control process including a synchronization of a clock delay in each layer block and a synchronization of a clock delay above the upper part of a layer. CONSTITUTION: According to a circuit design condition of each layer block in a semiconductor chip, a plurality of source points control the clock delay to synchronize a clock delay value from each source point of each layer block to a clock input circuit operated in synchronization with a clock. An area terminal is installed in the source point and a clock input terminal of the semiconductor chip is connected to each area terminal by a clock line, so that the clock is distributed above the upper part of the layer. The clock delay between layer clocks is controlled.