发明名称 Method and system for design verification using proof-partitioning
摘要 A design verifier includes a bounded model checker, a proof partitioner and a fixed-point detector. The bounded model checker verifies a property to a depth K and either finds a counterexample, or generates a proof in the form of a directed acyclic graph. If a counterexample is found, the bounded model checker selectively increases K and verifies the property to the new larger depth using the original constraints. If no counterexample is found, the proof partitioner provides an over-approximation of the states reachable in one or more steps using a proof generated by the bounded model checker. The fixed-point detector detects whether the over-approximation is at a fixed point. If the over-approximation is at a fixed-point, the design is verified. If the over-approximation is not at a fixed point, the bounded model checker can iteratively use over-approximations as a constraint and verify the property to a depth K.
申请公布号 US2004153983(A1) 申请公布日期 2004.08.05
申请号 US20030357657 申请日期 2003.02.03
申请人 MCMILLAN KENNETH L. 发明人 MCMILLAN KENNETH L.
分类号 G06F9/45;G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F9/45
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