Integrated memory circuit with dynamic memory cell, into which date is to be written, fitted on word line and bit line, while read-out amplifier is coupled to two supply lines for high and low supply potential respectively to amplify charge

摘要

Dynamic memory cell (1) is fitted on word line (WL) and bit line (BL1). Read-out amplifier (3) is coupled to first supply line (12) for high supply potential and second supply line (13) for first low supply potential to amplify charge difference on two bit lines (BL1,2). Two data lines (17) are connectable, via circuit (5) to both bit lines to write datum, by activating this circuit (5), according to two data signals (LDQ1,2) to both bit lines. Control (L1) separates both supply line from supply potentials, with connecting circuit activation, to deactivate amplifier. Independent claims are included for method to write data signal into memory cell.