| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock distribution method for a semiconductor integrated circuit capable of supplying a clock with an adjusted phase from a clock tree formed by CTS execution to a flip-flop. SOLUTION: In a step S6, a timing error generation flip-flop is extracted on the basis of timing information data generated in a step S5. In a step S7, a flip-flop having a clock phase to be corrected to advance the clock phase for removing a timing error of the flip-flop is extracted. In a step S8, a clock buffer in the intermediate step of the clock tree is selected on the basis of the clock phase database generated in the step S4. In a step 9, a clock is distributed to the semiconductor integrated circuit after the clock buffer is changed so that the selected clock buffer serves as a clock supply source of the flip-flop with the phase to be corrected. COPYRIGHT: (C)2004,JPO&NCIPI
|
