发明名称 BIAS CIRCUIT FOR SEMICONDUCTOR ELEMENT
摘要 PROBLEM TO BE SOLVED: To provide a bias circuit for semiconductor element for preventing destruction of a semiconductor element. SOLUTION: The bias circuit for semiconductor element including: a FET 12 having a plurality of terminals; and a bias power supply circuit 11 for applying a bias voltage to a gate terminal G of the FET 12, is provided with a protection circuit 15 connected to a midpoint C2 between the gate terminal G and the bias power supply circuit 11 and including a diode 15b that is conductive when a voltage at the midpoint C2 is greater than a prescribed value. COPYRIGHT: (C)2004,JPO&NCIPI
申请公布号 JP2004186735(A) 申请公布日期 2004.07.02
申请号 JP20020347827 申请日期 2002.11.29
申请人 TOSHIBA CORP 发明人 KOJIMA HARUO
分类号 H03F1/52;H03F3/193;(IPC1-7):H03F1/52 主分类号 H03F1/52
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