发明名称 Processor
摘要 In a processor executing plural instructions simultaneously, writin-destination-register numbers of the plural instructions to be executed simultaneously are compared, and kinds of operations to be executed by the plural instructions are changed in response to a comparison result. When the writing-destination-register numbers of the plural instructions are identical, a constant operation is applied to plural operation results obtained from the plural instructions to obtain an operation result and the operation result is written into the writing-destination-register instructed by the plural instructions. Results outputted from plural processing units are put together into one result and the result is stored in one register. Thus, register use efficiency and process efficiency are improved.
申请公布号 US6757813(B1) 申请公布日期 2004.06.29
申请号 US20000602057 申请日期 2000.06.23
申请人 NEC CORPORATION 发明人 IGURA HIROYUKI
分类号 G06F7/00;G06F7/38;G06F9/30;G06F9/302;G06F9/305;G06F9/318;G06F9/38;(IPC1-7):G06F9/30 主分类号 G06F7/00
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