发明名称 Verfahren zum Metallisieren ausgewaehlter Oberflaechenbereiche auf Unterlagen
摘要 1,151,227. Semi-conductor devices. WESTERN ELECTRIC CO. Inc. 7 July, 1966 [9 July, 1965], No. 30532/66. Heading H1K. [Also in Division C7] A planar diode consisting of a slice 11 of N- type silicon having a P-type surface region 12 is formed with a Ni coating 16 by forming a SiO 2 layer on the Si slice, removing it, by etching, from the selected area of the slice, dipping the entire surface in SnCl 2 and then PdCl 2 , etching to remove part of the SiO 2 layer together with its covering of SnCl 2 and PdCl 2 , and then plating in an electroless Ni bath to deposit Ni on the selected area which still retains its catalytic PdCl 2 coating. Contact material e.g. Ni, Au or Ag or successive layers of Pd, Rh and Ag may be applied to the Ni.
申请公布号 DE1521604(A1) 申请公布日期 1969.09.18
申请号 DE1966W041935 申请日期 1966.07.05
申请人 WESTERN ELECTRIC COMPANY INC. 发明人 THOMAS CHUSS,JOHN
分类号 C23C18/16;C23C18/18;H01L21/00;H01L23/485 主分类号 C23C18/16
代理机构 代理人
主权项
地址