发明名称 |
Source-biased memory cell array |
摘要 |
A memory cell array employs "source-biasing", wherein a bias voltage is applied to the sources of one or more FETs within a memory cell to reduce their "off" state sub-threshold leakage currents. The source-bias voltage is selectively switched between a small positive bias voltage for "off" FETs, and ground for FETs which are being read. A plurality of source-bias circuits provides the selectively switched bias voltages to the memory cells in the array.
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申请公布号 |
US6744659(B1) |
申请公布日期 |
2004.06.01 |
申请号 |
US20020315523 |
申请日期 |
2002.12.09 |
申请人 |
ANALOG DEVICES, INC. |
发明人 |
EBY MICHAEL D.;MIKOL GREGORY P.;DEMARIS JAMES E. |
分类号 |
G11C11/412;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/412 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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