| 摘要 |
A ferroelectric memory capable of multi-value memory retention is provided with hardly modifying a circuit of the related art. The period for which a write pulse is applied changes depending upon a value to be stored, so that multi-value storage is attained. Only one voltage is prepared for the write pulse, and a reset or read pulse and the write pulse have the same voltage, thus achieving a ferroelectric memory having a multi-value storage function using only one voltage source.
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