| 摘要 |
A capacitor structure includes a device isolation layer pattern formed at a predetermined region of a semiconductor substrate to define an active region; an upper electrode disposed over an upper center of the active region to expose an edge of the active region; a lower electrode region formed in the active region under the upper electrode; and a lightly doped region overlapping with an outer edge of the lower electrode region. In this manner, the resulting breakdown voltage of the device can be increased.
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