| 摘要 |
An ASIC (14, 14', 14'') conditions two independent outputs (VINM, VINP) of a full Wheatstone piezoresistive bridge (12) in separate conditioning paths. Each path is provided with a bridge supply voltage (VHB1, VHB2) which can serve as a temperature related input signal to respective offset and gain compensation control circuits. The half bridge outputs are inputted to respective amplifiers (U1, U2) along with a selected percentage of the temperature dependent bridge supply voltage. The outputs of the amplifiers provide a signal proportional to respective half bridge output voltage. In one embodiment, the output of the amplifier (U2) in one conditioning path of one half bridge is connected to the input of an amplifier (U4) in the other conditioning path to provide a signal in the one path proportional to the Wheatstone bridge differential output voltage and in the other path a signal proportional to the Wheatstone half bridge output voltage. In another embodiment, the temperature dependent bridge supply voltage is multiplexed for a selected time upon power-up to an amplifier (U5) which normally receives an input from one of the bridge outputs.
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