发明名称 METHOD OF MANUFACTURING 1T1R RESISTANCE MEMORY ARRAY
摘要 PROBLEM TO BE SOLVED: To provide a method of forming a 1T1R resistance memory array which can be used for forming a transistor array which forms a resistance memory array whereby the resistance memory array can be formed without the need for a number of additional steps in a step of forming a support circuit. SOLUTION: The method of forming a 1T1R resistance memory array structure on a semiconductor substrate comprises (a) a step of forming a polycide/oxide/nitrogen gate stack on the semiconductor substrate so as to be overlaid on a gate dielectric, (b) a step of generating source and drain regions adjacent to the gate stack, (c) a step of performing saliciding to generate a silicide on the exposed source and drain regions, and (d) a step of forming a nitrogen sidewall along the gate stack. Further, the method includes (e) a step of depositing a silicon oxide insulating layer and flattening the layer as the level of the gate stack, (f) a step of patterning a bit contact connected to the drain region and performing etching thereon, (g) a step of depositing a bottom electrode and flattening the electrode, (h) a step of depositing a layer of a resistance memory material, and (i) a step of forming an upper electrode on the layer of the resistance memory material. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004119958(A) 申请公布日期 2004.04.15
申请号 JP20030167121 申请日期 2003.06.11
申请人 SHARP CORP 发明人 SHIEN TEN SUU;ZHUANG WEI WEI
分类号 H01L39/00;G06F12/00;G11C13/00;H01L21/8246;H01L27/10;H01L27/105;H01L27/24;H01L43/08;(IPC1-7):H01L27/10 主分类号 H01L39/00
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