| 摘要 |
A system and method is disclosed for tracking/adapting phase or frequency changes in an incoming serial data stream that may contain significant amounts of noise and/or jitter and may contain relatively long periods of successive univalue data bits. The method includes a process for adapting a clock control loop, including the steps of: digitally sampling a received data stream at predefined intervals to produce a data set; estimating when logic transitions occur in the data set; detecting a timing trend represented by the estimated logic transitions; and adjusting a frequency of the first clock so that the timing trend averages approximately zero over a plurality of logic transitions. The system includes an adaptive control loop having one or more latches, coupled to a first clock, for digitally sampling a received data stream at predefined intervals to produce a data set; an edge detector, coupled to said one or more latches, for estimating when logic transitions occur in the data set; a digital filter, coupled to the edge detector, for detecting a timing trend represented by the estimated logic transitions; and a frequency adjustor, coupled to the digital filter and to the first clock, for adjusting a frequency of the first clock so that the timing trend averages approximately zero over a plurality of logic transitions.
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