发明名称 Register stack engine having speculative load/store modes
摘要 A computer system is provided having a register stack engine to manage data transfers between a backing store and a register stack. The computer system includes a processor and a memory coupled to the processor through a memory channel. The processor includes a register stack to store data from one or more procedures in one or more frames, respectively. The register stack engine monitors activity on the memory channel and transfers data between selected frames of the register stack and a backing store in the memory responsive to the available bandwidth on the memory channel.
申请公布号 US2004064632(A1) 申请公布日期 2004.04.01
申请号 US20030663247 申请日期 2003.09.15
申请人 LIN DERRICK 发明人 LIN DERRICK
分类号 G06F9/30;G06F9/312;G06F9/38;G06F12/00;G06F13/00;(IPC1-7):G06F12/00 主分类号 G06F9/30
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