| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit provided with a shift-scan type testing circuit that can be shortened in testing time. SOLUTION: A shift-scan chain composed of logic circuit blocks 11-18 and scan registers 21-28 connected to the poststages of the blocks 11-18 is divided into split chains of scan registers 21-24 and 25-28. When the semiconductor integrated circuit is operated for test, input data TI for test are given to the scan registers 21 and 24 at the front ends of the divided chains synchronously to a multiplied clock signal CKD which is obtained by doubling a clock signal CK after the data are converted into parallel data S41 and S42 by means of a serial/parallel conversion circuit 40. Consequently, the lengths of the split chains become 1/2 and the testing time can be shortened. COPYRIGHT: (C)2004,JPO
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