| 摘要 |
Phone operation controlled by microprocessor (10), associated with memory (12), connected to battery (15) via shunt capacitor (17). If battery supply is briefly interrupted, e.g. by mechanical impact, capacitor maintains voltage for short time after which memory is effaced and re-initializing and re-authenticating required. Check on integrity of memory performed following any transient interruption. The check is instituted by the microprocessor as soon as the interruption is detected by a distribution unit (20), which passes a signal (RS) to a differentiating unit (20), which passes a signal (RS) to a differentiating circuit (30). The signal takes the value 0 when the voltage falls below a threshold value, typically 50% of nominal; if it shortly after rises above this value, the signal assumes the value 1. A logic signal (PWON), dependent on the integrity check, is issued by the microprocessor, and controls the differentiating circuit, whose output (30S) passes to a summator (32), also receiving signals (CHARG) denoting the presence or absence of the battery charger (16). The summator output passes to an input (IGN) on the microprocessor, to begin, should the memory check show effacement has occurred, reinitialization. |
