发明名称 Peripheral bus jumper block for a configurable peripheral bus interconnect system
摘要 A peripheral bus jumper block that establishes an external peripheral bridge for linking independent peripheral bus signal paths (i.e., sets of electrical traces formed on a peripheral bus panel) of a peripheral bus interconnect system so that the signal paths have the functional equivalent of a single, continuous peripheral bus path. Accordingly, arrays of computer peripherals (e.g. disk drives) that are coupled to the peripheral bus signal paths within a peripheral device enclosure are chained together so as to be capable of being operated by the same computer controller, whereby the peripheral bus interconnect system can be selectively reconfigured to improve system flexibility. The peripheral bus jumper block has a pair of peripheral bus connectors that are detachably connected to respective peripheral bus connectors from a pair of the peripheral bus signal paths that are to be linked together.
申请公布号 US6704832(B1) 申请公布日期 2004.03.09
申请号 US20010774233 申请日期 2001.01.31
申请人 STORCASE TECHNOLOGY, INC. 发明人 NG YIU-KEUNG
分类号 G06F13/40;(IPC1-7):G06F13/00 主分类号 G06F13/40
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