| 摘要 |
PROBLEM TO BE SOLVED: To provide an information processing unit capable of speeding up an address comparing process between a cache address and a store address of VSC command. SOLUTION: Vector units 21, 31 output a flash address to flash address arrays 24, 34. A master unit 2 and a slave unit 3 compare an address registered in the cache and the flash address by flash address arrays 24, 34, and transmits the matched address to an address array 25 when the addresses are matched. The flash of the address of the address array 25 is performed on the basis of the address transmitted from the flash address arrays 24, 34, and the flash processing is terminated when a cache control circuit 23 receives END signals from both of the master unit 2 and the slave unit 3. COPYRIGHT: (C)2004,JPO
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