发明名称 CORRECTION METHOD FOR FIGURE PATTERN FOR SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a correction method for a figure pattern for a semiconductor device and a manufacturing method for a semiconductor device, which can suppress increase in chip area, while resolving the hindrance of securing of gate extruding amount which is brought about by a corner-rounding phenomenon at miniaturization. <P>SOLUTION: This correction method for a figure pattern for a semiconductor device, which does not influence the concave-shaped diffused layer corresponding part of a figure pattern for a semiconductor device, and another pattern that exists near a gate includes a process 102, which detects the concave-shaped diffused layer corresponding part, and a process 103 which corrects the concave-shaped diffused layer corresponding part or a transistor gate corresponding part, which protrudes from the concave-shaped diffused layer corresponding part, so as to secure projection of the gate from the concave-shaped diffused layer corresponding part with respect to the corner-rounding phenomenon. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004004904(A) 申请公布日期 2004.01.08
申请号 JP20030177490 申请日期 2003.06.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TSUJIKAWA HIROYUKI;SHIBATA HIDENORI;MUKAI KIYOSHI
分类号 G03F1/36;G03F1/68;G06F17/50;H01L21/027;(IPC1-7):G03F1/08 主分类号 G03F1/36
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