发明名称 Information processing apparatus
摘要 A circuit includes a transmission function of transmitting data together with a source clock synchronized to the data to another module, a reception circuit for receiving the data outputted by the module and a source clock synchronized to the data, and a synchronization circuit for connecting the circuit having a transmission function to the reception circuit are formed on a single-chip integrated circuit. Even if the module connected to the bus is changed, i.e., even if the operation clock frequency of the module of the other party is changed, other modules can be used as they are without making any change. The cost needed at the time of system construction can thus be reduced. Furthermore, as for the aspect of performance, only one synchronization circuit is needed. The increase of latency caused by synchronization can also be suppressed to the minimum.
申请公布号 US6665807(B1) 申请公布日期 2003.12.16
申请号 US19990389228 申请日期 1999.09.03
申请人 HITACHI, LTD. 发明人 KONDO NOBUKAZU;NOGUCHI KOKI;KAWASAKI IKUYA
分类号 G06F13/40;(IPC1-7):G06F1/12 主分类号 G06F13/40
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