| 摘要 |
A memory system includes an array of memory cells with a Bit Mask circuit provided in each memory cell. The memory system also includes a bus circuit with a set of Address Bus lines, a set of Data Bus lines, a set of Origin Bus lines and a set of Control lines, each memory cell being connected to each of the sets of lines. In a first operating mode, the system stores data applied on the Address Bus. In a second operating mode, a memory cell having a position defined by the Address Bus outputs on the Data Bus the data stored in that cell. In a third operating mode, the searched data is applied on the Address Bus and each memory cell with matching data outputs on the Data Bus a value representing the Address of the memory cell. However, the cell address is output on the Data Bus only where the position of that particular memory cell is the closest, in a predefined direction, to the data set on the Origin Bus among all the cells with matching data.
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