发明名称 Method and apparatus for increasing processor performance in a computing system
摘要 A method and apparatus for increasing the performance of a computing system and increasing the hit ratio in at least one non-L1 cache. A caching assistant and a processor are embedded in a processing system. The caching assistant analyzes system activity, monitors and coordinates data requests from the processor, processors and other data accessing devices, and monitors and analyzes data accesses throughout the cache hierarchy. The caching assistant is provided with a dedicated cache for storing fetched and prefetched data. The caching assistant improves the performance of the computing system by anticipating which data is likely to be requested for processing next, accessing and storing that data in an appropriate non-L1 cache prior to the data being requested by processors or data accessing devices. A method for increasing the processor performance includes analyzing system activity and optimizing a hit ratio in at least one non-L1 cache. The caching assistant performs processor data requests by accessing caches and monitoring the data requests to determine knowledge of the program code currently being processed and to determine if patterns of data accession exist. Based upon the knowledge gained through monitoring data accession, the caching assistant anticipates future data requests.
申请公布号 US2003221072(A1) 申请公布日期 2003.11.27
申请号 US20020154380 申请日期 2002.05.22
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 AZEVEDO MICHAEL JOSEPH;WALLS ANDREW DALE
分类号 G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/08
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