| 摘要 |
An electrically addressable data storage unit 80 has a matrix of rows and columns of data storage arrays 81-89 on a single substrate 90. Each array 14 is a matrix of coplanar data storage diode cells 16 connected by row lines 18 and column lines 20 for recording, addressing and reading of data. The address lines 91, 92, 97, 98 and power lines 104-106, 120-122 of the plurality of arrays 81-89 are connected to the arrays 81, 84, 87 and 87, 88, 89, respectively, so that only the data storage diode cells in the array 87 of a selected data storage cell 150 are enabled, thereby eliminating undesirable power dissipation in all other arrays of the data storage unit. <??>A plurality of row address lines 91, 92 are each in contact through row decoders 81a, 84a, 87a with the rows of all of the arrays 81, 84, 87 in one of the columns of the data storage arrays. A plurality of column address lines 97, 98 are each in contact through column decoders 87b, 88b, 89b, with the columns of all of the arrays 87, 88, 89 in one of the rows of the data storage arrays. A controller (not shown) enables the row address lines 91, 92 and column address lines 97, 98 to selectively address a data storage diode cell 150 in a selected array 87.
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