发明名称
摘要 PURPOSE:To provide a thin film transistor having a highly reliable gate film which is hardly affected by charge-up phenomenon, plasma damage, static electricity, etc., during a manufacturing process, a packaging process, actual use, etc. CONSTITUTION:The title device is a polycrystalline silicon thin film P-channel MOS transistor which is comprised of a polycrystalline silicon film 10 forming a bulk layer formed by interposing an N<+>-type polycrystalline silicon film 7 forming a gate electrode and a silicon dioxide film 8 forming a gate film thereon and a P<+>-type polycrystalline silicon film 11 forming a source/drain region formed at both sides thereof. A through-hole 9 is provided to one region excepting a region wherein the N<+>-type polycrystalline silicon film 7 of the silicon dioxide film 8 is formed. The P<+>-type polycrystalline silicon film 11 forming a wiring layer formed by the same layer formation as the polycrystalline silicon film 10 is connected to a P<+>-type diffusion layer 5 which is formed inside an N-type well 2 inside an N-type silicon substrate 1 through the through-hole 9.
申请公布号 JP3460269(B2) 申请公布日期 2003.10.27
申请号 JP19930273834 申请日期 1993.11.01
申请人 发明人
分类号 H01L27/11;H01L21/822;H01L21/8244;H01L27/04;H01L29/78;H01L29/786 主分类号 H01L27/11
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