Fractional-N frequency synthesizer and method

摘要

A fractional-N frequency synthesizer is based on a PLL which employs a multi-phase VCO and a multi-phase frequency divider to provide a desired fractional-N divider ratio. The multi-phase frequency divider includes a multi-modulus divider which divides a VCO output waveform with a division ratio that varies in response to a modulus control signal. The divided output is delayed to produce a plurality of outputs, each of which has a respective phase that corresponds with the phase of a respective VCO output. A phase selector provides a selected one of the outputs to the PLL's phase detector in response to a phase control signal such that the multi-phase frequency divider provides a fractional-N division ratio. To reduce fractional spurs, a modulator randomizes the modulus and phase control signals, which serves to randomize and thereby reduce phase mismatch error which might otherwise be present in the frequency synthesizer's output.