| 摘要 |
A per bank page closure system for use in a multi-bank memory includes a timer, an activity register. The timer is used to define timing windows. The banks of the memory are mapped to bits in the activity and closure registers. Page activity occurring a timing window is tracked by setting appropriate bit(s) in the activity register and resetting appropriate bit(s) in the closure register. At the end of each timing window, page(s) that were both opened in the previous timing window and are not represented in the activity register are scheduled for closure by setting corresponding bit(s) in the closure register. Then the activity is reset and the process is repeated.
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